#ifndef __HIDWLDRV_H__
#define __HIDWLDRV_H__

#include <winioctl.h>
#include <windows.h>
#include <dbgapi.h>

#define DWL_INTR_EVENT_NAME     (TEXT("DwlIntrEvent"))
#define DECHW_REGMAP_PADDR      0x20004000   //address of hantro registers
#define DWL_IST_PRIORITY        203
#define MEM_MAP_BASE_SIZE       0x1000
#define SYSCTRL_BASE_ADDRESS	0x20040000
#define DEC_CLOCK_ENABLE        (1<<4)
#define SCPEREN								0x024
#define SCPERDIS							0x028

#define DEC_DEBUG             1            // define to non-zero to enable debug messages
#define DEC_DEBUG_EXTRA       0            // enables verbose debug messages 

#define DWLMSG(cond,printf_exp)	 \
   (NKDbgPrintfW printf_exp)
   
#define        IOCTL_DWL_GETREGVA    \
    CTL_CODE(FILE_DEVICE_VIDEO, 0x101, METHOD_BUFFERED, FILE_READ_ACCESS)

#define        IOCTL_DWL_GETRESMEM    \
    CTL_CODE(FILE_DEVICE_VIDEO, 0x102, METHOD_BUFFERED, FILE_READ_ACCESS)

#define        IOCTL_DWL_ALLOCBUFFER    \
    CTL_CODE(FILE_DEVICE_VIDEO, 0x103, METHOD_BUFFERED, FILE_READ_ACCESS)

#define        IOCTL_DWL_FREEBUFFER    \
    CTL_CODE(FILE_DEVICE_VIDEO, 0x104, METHOD_BUFFERED, FILE_READ_ACCESS)
#define        IOCTL_DWL_INTR_DONE   \
    CTL_CODE(FILE_DEVICE_VIDEO, 0x105, METHOD_BUFFERED, FILE_READ_ACCESS)

#define        IOCTL_DWL_ALLOC_MEM_SLOT   \
    CTL_CODE(FILE_DEVICE_VIDEO, 0x106, METHOD_BUFFERED, FILE_READ_ACCESS)

#define        IOCTL_DWL_FREE_MEM_SLOT   \
    CTL_CODE(FILE_DEVICE_VIDEO, 0x107, METHOD_BUFFERED, FILE_READ_ACCESS)

#ifdef DWL_DEBUG

#ifdef  RETAILMSG
#undef  RETAILMSG
#endif

#define RETAILMSG(exp, p) DEBUGMSG(exp, p)
#endif





/* 7170 decoder interrupt register offset from base address */
#define HWDEC_INTR_REGISTER_OFFSET          (0x4)
/* Mask for setting the power-on bit on 7170. (1st LSB = 1) */
#define HWDEC_POWER_REGISTER_SETMASK        (1)
/* Mask for clearing the decoder interrupt bit on 7170. (8th LSB = 0) */
#define HWDEC_INTR_REGISTER_CLEARMASK       (~(1<<8))
/* Macro for setting on the power-on bit in 32-bit variable x */
#define HWDEC_POWER_ENABLE(reg) ((reg) | HWDEC_POWER_REGISTER_SETMASK)
/* Macro for clearing the interrupt bit in 32-bit variable x */
#define HWDEC_CLEAR_INTR(reg)   ((reg) & HWDEC_INTR_REGISTER_CLEARMASK)

/* PP interrupt register offset */
#define HWPP_INTR_REGISTER_OFFSET          (0xF0)
/* Mask for clearing the decoder interrupt bit on 7170. (8th LSB = 0) */
#define HWPP_INTR_REGISTER_CLEARMASK       (~(1<<8))
/* Macro for clearing the interrupt bit in 32-bit variable x */
#define HWPP_CLEAR_INTR(reg)   ((reg) & HWDEC_INTR_REGISTER_CLEARMASK)

    
#define SAFEDELETE( pointer ) \
    if ( NULL != pointer )    \
    {                         \
        delete pointer;       \
        pointer = NULL;       \
    }    

typedef struct Dwl_Phy2Virt_Addr
{
    PBYTE pPhyAddr;
    PBYTE pVirtAddrfrmAllocPhysMem;
    PBYTE pVirtAddrfrmMmMapIoSpace;
    DWORD dwAllocSize;
}DWL_PHY_VIRT_ADDR;

#endif /*__HIDWLDRV_H__*/ 
